- Digitally triggered CROs have got it wrong!
While we're on the subject of triggering CROs to look at TV waveforms, all the Digital CROs and Analog CROs with digital triggering (including Tektronix), that I investigated while working at the TV station, have included some digital circuitry to make it easy to select a particular line on a particular field to trigger the CRO. Unfortunately this seems to stop them displaying reality. As the screens of most digital CROs dont actually show the waveform anymore but just a representation of it, we shouldn't be suprised that the triggering would be just as unreal. I hope you've read the previous section because we're going to delve into the field-group and its function a bit more.
In the previous section I said that the field group is used to trigger the vertical scan of the picture tube and the hor line sync pulses trigger the horizontal scan. Each vertical scan, called a field, lasts for 20000 micro-seconds. Each TV line lasts for 64 micro-seconds. The maths says there will be 312.5 lines in a field.
Looking at a field group of pulses in fig. 6, we can strip away all the excess pulses and end up with a field pulse that is 2.5 lines long. Now from the above calculation you can see that it takes two fields to get a whole number of lines, 625 in fact. This means, as shown in fig. 6d, that only every second field pulse will be co-incident with a line sync pulse. The alternate field pulse will sit halfway along a line between the hor sync pulses as in fig. 6c. It is important to note that it sits there, not because it is jiggering back and forth in time but because of the odd number of scan lines.
If you sit on the hor syncs and use them as a reference to watch the field pulses come and go, you will think the field pulses jump back and forth but if you sit on time and use it as a reference you will see the field pulses go past as regular a clock-work but the line syncs wont always line up with them.
CROs, which use the field pulses to trigger their sweeps, will display reality as in fig. 6a . That is, the traces will take their timing from the field pulses at all times. On the other hand CROs which use digital triggering, ie those having a line number selector and an odd/even field selector on the front panel, dont actually use the field pulses to trigger their sweep.
As we saw previously, it takes two fields, called a frame, to get right through all the 625 lines in a TV picture. Usually, digitally triggered CROs, as shown in fig. 7, have an even-field pulse detector and use it to reset a divide by 625 counter. Another part of the circuit strips off all the twice-line pulses from the field groups and feeds the resultant 15625 hz pulses to clock the counter. By selecting any particular count of the counter, you can trigger the sweep to show any TV line you want. No problem, terrific, if that's what you want but when it comes to the field pulse triggering, they cheat.
As you can see in fig. 6a, the field pulse actually sits in the middle of the field group and if we use it to trigger the sweep we will not be able to see the bit (pre-equalising pulses plus the first part of the field pulse) that occured before we triggered the sweep. The digital trigger designers thought they could improve this by actually triggering on a TV line that occurs a bit before the field group you desire, so now you can see the whole field group. Once again, terrific if that's what you want, but you must now remember, that the CRO is not being triggered by the field pulses. Remember the alternate field pulse occurs half way along a line and as the CRO is triggering from the hor line sync pulse counter, it has lost the half line offset that it should be displaying.
A simple way to test your CRO, assuming it has two inputs, is to do the following :-
- Feed the same composite TV signal into both inputs.
- Set the sweep timebase to "50 µsec/div". (It might pay to uncalibrate the timebase and use the variable knob to adjust it to approx 70 µsec/div.)
- Set the triggering to "TV field", "Vert", or "All fields", whatever is appropriate for your CRO.
- Set the vert mode switch to "Alternate". (If you dont have an "Alt/Chop" switch then it is probably switched automatically by the Timebase Switch setting. Make sure the traces are alternating, not chopping.)
- Adjust the rest of the controls to get two traces on the screen, one above the other.
- You should see one field-group at the beginning of each trace with a few TV lines on the right-hand end of each trace.
If your CRO is using the field pulses to trigger, then the field-groups will line up vertically while the TV lines will be offset to each other. See fig. 6a . This is reality.
If your CRO is cheating and using the line counter, to trigger the timebase, instead of the field pulse then you will see that the TV lines will line up vertically and the field-groups will be offset as in fig. 6b . This is not what is really happening but is a representation displayed as if you were sitting on the hor line sync pulses and will give you the impression that the field pulses are jumping back and forth, when in reality it is the uneven number of hor line synch pulses which are the culprit. You cant do anything about it but at least now you know.
- Reducing power dissipation in a 3-terminal regulator.
Most people have probably built a variable power supply using a 317 3-terminal regulator. You will have noticed that it gets hot when you pull high current while the output voltage is set low. Its even worse if the output is short circuited. This is due to the poor chip having to dissipate almost all the power output capability of the power supply until it shuts down from thermal overload. We could aleviate the problem if we could reduce the input voltage as we reduce the output voltage.
- The simplest way to do this is shown in fig. 8 . We wire a power resistor in series with the regulator input and short it out as the output voltage is wound up. A comparator with a small amount of hysterisis operates a relay to short the resistor when the o/p voltage reaches about 40% of max. Now you can see that the 317 only has to handle half the power it did before. This primitive cct does work but does not reduce the power dissipated by the power supply, it just shifts some of it from the regulator to the resistor. You will still need the same size power-supply heatsink to get rid of the total amount of heat, which hasn't changed.
- The next cct is a bit more elegant, see fig. 9 . We use a centre tapped transformer and switch from half the winding to all the winding as the output voltage is wound up. Now you can see that the 317 only has to handle half the power it did before and the whole power supply will dissipate less. The problem with this circuit is that, as the relay changes over, there will be a time period where the reservoir capacitor is receiving no current from the transformer and so has to supply the total o/p current itself. To do this, it is usually made up to 5 times as big as usual. Also there will be a flash as the relay has to break the total charging current and then reconnect it. If you use a make-before-break relay then there will be an even bigger flash as it shorts out one section of the transformer winding every time it changes over. A third minor problem is that the load current is not spread evenly over the whole secondry winding.
- We could re-arrange the cct to look like fig. 10 . At least now we keep the load spread over the whole secondary winding but we still have the current breaking problem.
- Looking at fig. 11 , we can split the single change over relay contact into two seperately operated single make contacts and wire them like so. If you analyse the cct you will find that the centre tap connection is always at a positive voltage when contact 'b' is open and contact 'a' is closed.
- Enter the magic diode in figs. 12 & 13 . I've replaced contact 'b' with a diode. Now with contact 'a' open, D1,3 & 4 operate to produce the standard full wave rectification of a centre tapped transformer. With contact 'a' closed, D1 becomes reversed biassed and D2,3,4,5 operate in the standard fullwave rectification of a single winding, this time the whole secondary winding, ignoring the centre tap. Thus the DC voltage on the reservoir cap doubles with no drama when contact 'a' is closed. As there is no break in charging current the cap can be it's normal value.
- Another advantage of this arrangement is that contact 'a' could be replaced by a transistor as in fig. 14 . Now you can have instantaneous electronic switching without any sparks at all.
- Yet another, not so obvious, advantage is that you can now get double the current out of the transformer at the low voltage setting. You would have to double the value of the cap but this is a small price to pay for more efficient use of the transformer.
- This idea can be extended to two transformer secondaries as in fig. 15 . There are only two seperately operated single make contacts and you can get four combinations from them. Of course if you pull the extra current, you wont save any power dissipation. If both transformers are 10volt RMS 1amp centre-tapped then the combinations are as follows :-
Rectifying small voltages.
Quite often it is necessary to provide a useful dc voltage from a small AC voltage. See fig. 16 . Here we have a 1v pk-pk cal signal from an oscilloscope and we need to produce 5v DC. There is usually very little current available from this source so a switching regulator is out. Fig. 17 shows a normal voltage doubler, which effectively has two diodes in series with the o/p. As a normal diode drops 0.6v at low currents, there will be no voltage on the o/p cap. This is due to the i/p voltage swing not being enough to turn on the two diodes. We could use Schottky diodes, which have about 0.3v drop, giving 0.4v at the output of the doubler. It would take many voltage doublers, connected in series, to get to 5v and there would be no current available when we got there. (The amount of current you can get from each doubler is less than half that of a simple peak rectifier so it wouldn't take many doublers to end up with no current at all.) Maybe we should try using transistors which saturate at about 0.1v or less. This seems to be our only chance.
First a bit of AC/DC theory. If you pass a waveform of any shape through a capacitor/resistor coupling circuit of sufficient size so as not to distort the waveform shape, the o/p will have any DC level of the i/p waveform removed. The o/p waveform will settle itself with its average level sitting on the reference level fed into the bottom of the resistor. See fig. 18 . The area above the average line will equal the area below it. So if we consider a normal sinewave i/p that has enough DC level to make the bottom peak just sit at ground potential then the o/p waveform will have half the amplitude above the reference and half below it. The DC will have been removed. If nothing changes in the waveform then it will sit this way for ever. If we want to get the o/p waveform the same as the i/p (restore its DC level) we will have to raise it somehow.
The trick is to place a diode across the resistor so that when the sinewave tries to swing negative with respect to the reference (ground in fig. 19 ), the diode will conduct and clamp the negative peak to ground. It will do this by charging the o/p side of the capacitor to a DC level which will raise the o/p waveform by the appropiate amount. Or so the theory goes. Unfortunately a normal diode needs about 0.6v to make it work so the negative peak of the waveform will not be raised all the way up to ground but will sit 0.6v below it, as in fig. 19 . The diode only conducts for a short period of time necessary to charge the cap. The rest of the time the resisitor is draining away the charge, on the cap, to ground. This leakage has to be made up by the diode conducting on every negative peak. If the leakage is too severe the waveform, which has to supply the current, will distort by flattening the smooth curve on the bottom peak.
What happens if we remove the diode and feed in a square wave? See fig. 18 . It will act just like the sinewave and settle with half the waveform above ground and half below. (Hence the 1v cal signal from the oscilloscope will settle with 0.5v above the ref and 0.5v below it and therefor cannot turn on a silicon diode.) Reconnect the diode and the squarewave will rise till its bottom is just one diode voltage drop below the ref as in fig. 19.
Now that the DC restorer has got the waveform back above the base line, we can rectify it with a normal peak rectifier, see fig. 20 . The DC restorer coupled to the peak rectifier makes up the normal voltage doubler circuit, see fig. 17 . The resistor in fig. 19 is no longer necessary as the load on the o/p will drain the input cap and keep the waveform hard against the diode. (By now you've probably spotted the fundamental misnomer in the above descriptions. That is, a voltage doubler doesn't actually double the input voltage, it just converts the pk-pk value into DC. As a normal rectifier just gives you the peak value in DC and the voltage doubler gives you the pk-pk value, which is twice the peak for a sinewave, it was called a voltage doubler, but if you consider the pk-pk value of the input voltage, the doubler just gives you x1 this value in DC. So it takes a quadrupler to give us double the input pk-pk value.)
Having built one voltage doubler, lets build another but this time, instead of returning the DC restorer diode to ground, lets connect it to the o/p of the first doubler, see fig. 21 . You should be able to see that the waveform on the second i/p cap C3 will now swing up by its full peak-peak level but using the voltage on C2 as its starting point, thus the two voltages added together will charge up C4 via D4 to this higher peak voltage. We can build another doubler and connect it likewise, as in fig. 22, gradually building up the voltage, etc, etc.
So far all the i/p caps have their negative leads connected to the input and the o/p caps have their negative leads connected to ground. This means the max o/p voltage is limited to the voltage rating of the last pair of caps. If we wanted more voltage than we could get a cap rated for, there is another trick we can do. Lets rewire the cct and connect the neg lead of each i/p cap to the pos lead of the i/p cap preceding it and the neg lead of each o/p cap to the pos lead of the o/p cap preceding it, see fig. 23 . Now there is no limit to the voltage we could reach, as each cap only has a small share of it. The only problem in doing this, is that the effective value of the o/p cap is reduced by all the o/p caps being in series. Same applies to the i/p cap. If we redraw this as in fig. 24 . we now have the Cockcroft-Walton multiplier, used in many, high to very high, voltage generators.
In our little cct we dont need to string all the o/p caps in series so we wont. Our problem is the reverse, not enough voltage. Lets look back at fig. 21, a voltage quadrupler. If we use schottky diodes we get an o/p voltage of 0.8v. Every time the voltage is transferred from the i/p caps to the o/p caps, we lose 0.3v across the o/p diodes. If we put a transister at these points we would only lose 0.1v or less. See fig. 25 . Here you can see that the transistors are basically emitter followers being switched on and off by the pulsing voltage on the next i/p cap. We seem to be getting something for nothing here but there are two important things going on.
That's what is happening in this cct. The pulsing voltage on the next cap is always higher than the pulsing voltage on the previous cap, guaranteeing saturation. Well almost, as the difference is not quite the full 0.6v we need, but it's close. Using just the diodes on their own, we would need 15 voltage doublers in series. Using the transistors as well, we only need 10, a marked improvement. Now if we could use transistors on the DC restoring diodes?
- It's the high gain of the transistor that allows it to conduct a fair amount of current without loading the cap, further up the chain, too much.
- This is even more important. As you probably know it is not normally possible to saturate an emitter follower as its emitter is always 0.6v below its base so that when its base is at the +v rail the emitter is 0.6v below it. BUT what if we could raise its base above the +v rail, wouldn't its emitter follow it up until it hits the +v rail, ie saturate?
In fig. 26 we now have transistors wired across the DC restoring diodes, with a fixed voltage from the second o/p cap keeping the first transistor on all the time. It will only conduct if its emitter tries to swing negative with respect to its collector. (It is in its saturation mode.) This description glosses over a rather sneaky operation of the transistor. (At this point it will pay you to read "Improving the pseudo pseudo UJT.) In fig. 27, when the i/p signal swings negative the transistor operates as drawn at (A), but when it swings positive the transistor suddenly turns itself upside down, its beta drops to around 7 and it operates as drawn at (B). The base/collector junction becomes the base/emitter junction and is forward biassed by the base current via the base resistor. The base/emitter junction becomes a reversed biassed base/collector junction and so the transistor conducts a current of about 7 times the base current. This wont stop the cct working but it will ruin the efficiency of the conversion somewhat. The way to minimise this is to use transistors with very high forward gain, which will minimise the base current necessary. Assuming all is well, the DC restorer now only loses 0.1v so the doubler output is 0.8v. This means we need 8+ doublers to produce 6.5v. (The + refers to the very last doubler, which is diode only, and is necessary to provide the drive for the transistors in the second last doubler.) If the transistors saturate at 0.05v then 7+ doublers will produce 6.5v. We actually only need 5v but we have to generate 6.5v to run a seperate 3-terminal regulator. If we could ditch the regulator we would only need 6+ doublers.
There is a way to regulate the output without a seperate regulator. If we vary the voltage that the first DC restorer restores to, we can move the output voltage up and down within a limited range. In fig. 28 we place another transistor between the base of the DC restorer transistor and ground. The base of this new transistor is fed from the output voltage via a zener diode. When the o/p voltage is less than the zener/vbe combination, the new transistor is off and the DC restorer works full on. When the o/p voltage rises above the combination, the zener conducts, turning on the new transistor, robbing the DC restorer transistor of base current, making the DC restorer less efficient and the o/p voltage will drop, etc, etc. As I mentioned earlier, we dont need to put the caps in series for higher voltages so fig. 29 shows the cct redrawn with the input caps in parallel and the output caps in parallel. This allows us to use smaller caps for the same output impedance.
Fig. 30 shows the block diagram of the finished design. Fig. 31 shows doubler types A & C. Fig. 32 shows type B. The final creation contains 15 diodes, 13 transistors, 14 caps, 13 resistors and generates a regulated 5v o/p BUT it's o/p current is a bit less than 1/6 of what comes out of the oscilloscope 1v cal o/p.
Well that's enough of me rambling on, heres something for you to do. Fig. 33 shows the low voltage transistor assisted multiplier with most of the schottky diodes removed. Will it still work? Dont rip out too much hair.
Improving the pseudo pseudo Unijunction Transistor.
You've probably all heard of the Unijunction Transistor. It appeared a long while before the 555 timer IC. It's basically a small bar of silicon with a single diode junction about halfway along the bar. The normal cct used to make it work is in fig. 34. A dc voltage is connected across the bar, end to end, via a small series resistor at each end, and the diode connection, which is called the emitter, is connected to ground via a capacitor and + volts via a resistor. When the + volts are applied, the emitter is held at ground potential by the capacitor and is reverse biased. A small current flows through the silicon bar and the series resistors. The voltage on the bar at the emitter diode point is about half the + volts. (It can be shifted slightly by the balance of the two small resistors but not by much.) The capacitor slowly charges up through its resistor until it reaches half the + volts. The emitter diode starts conducting and the injected electrons cause the diode and the silicon bar to switch to a low impedance. The low impedance discharges the capacitor, causing more current to flow through the small series resistors. This state of affairs continues until the capacitor runs out of current and, if the charging resistor is big enough to limit the emitter current to below a holding threshold, the UJT will switch back to its quiescent state and the cycle will begin again. The capacitor will have an exponential sawtooth across it with a peak value of approx half the + volts. The top series resistor will have a small negative pulse across it and the bottom one will have a small positive pulse across it. Quite a useful little device but it didn't take long for people to want to change the fraction of the + volts at which it triggered.
Enter the Programmable UJT. Fig. 35 shows a typical PUT cct. It still has the RC charging cct but also has a voltage divider connected to the anode gate. It's this divider that sets the trigger voltage of the PUT. A PUT, being only a pseudo UJT, functions like a UJT but doesn't work like one. It's actually a 4 layer diode like an SCR. But whereas an SCR has a cathode gate, the Prog UJT has an anode gate. It's more like a PNP and a NPN transistor connected as shown in fig. 36. If a small current is fed into the base of the NPN or taken from the base of the PNP, both transistors will snap on, due to the positive feedback from each collector to the other base. Not only does fig. 36 work in theory it actually works in practice as well. A BC548 and BC558 can be used as a pseudo pseudo UJT instead of an actual PUT or UJT. Together they cost a third as much as a PUT and one fifth of a UJT so its worth-while trying them.
Unfortunately a PUT and the Twin transistor cct dont work as well as they might. I will now get into the nitty gritty of why and what we can do about it.
In fig. 37 the base of Q1 is held at a voltage Vx by the voltage divider R2 & R3. Assuming the cap is discharged, the emitter of Q1 will be at earth and both transistors will be off. R1 slowly charges C1 exponentially. (The charging current decreases because the voltage across R1 is decreasing
as the voltage across C1 increases.) Eventually the emitter of Q1 reaches Vx plus 0.6v and Q1 conducts. Q1 collector current flows into Q2 base and Q2 turns on. Its collector current switches on Q1 even harder and so both transistors discharge C1 to a point where the current flowing into Q2 emitter cannot keep it conducting and so it switches off followed by Q1 and the cycle repeats.
Now this simple circuit works ok at low frequencies and only if you dont want to change its frequency. If the time constant R1/C1 is made too small (while trying to raise the frequency), the ramp waveform will have a large dead spot between each ramp. This is caused by the transistors taking too long to switch off at the bottom of the discharge cycle. This occurs because Q1 & Q2 work in the saturated mode where the base collector junctions becomes forward biased while the transistors are conducting. This causes the base collector capacitance to be charged and the transistor will not switch off until it is discharged, thus the dead spot.
If we could prevent the collector base junction from being forward biased, the problem would be solved. If we put a diode from collector to base, as in fig. 38, so that when the collector voltage approaches the emitter voltage the diode conducts, it will rob the base of drive current and so prevent the transistor from saturating. A normal 1N4148 will just do the job as its forward biassed voltage drop is slightly less than the collector base diode drop. Now that small Schottky diodes are available, they will work even better. See fig. 39.
Another problem ocurrs when you try to vary R1. Normally, to change the repetition rate you would vary R1 to change the capacitor charging current. Unfortunately the amplitude of the sawtooth across the capacitor also varies with R1. This appears to be due to the increased base current in Q2 causing the threshold Vx to change in unison. The higher the base current the lower Vx. There are three ways to solve this problem:-
Originally when transistors were first fabricated, they were symetrical devices. The semiconductor base between the collector base junction and the emitter base junction was pretty thick. The beta was low, ie around 20 and it didn't matter which way round the transistor was wired. As transistor design improved the semiconductor base got thinner and the emitter base junction and the collector base junction got more assymetrical. This made the beta increase, the collector base breakdown voltage increase but the emitter base breakdown voltage decrease. The more assymetrical the transistor became the more pronounced the effect. With a BC549 the normal beta is approx 300 to 600. The emitter base breakdown voltage (Vrbe) is approx 7v and the collector base breakdown (Vcb) is 30v. Running it upside down gives a beta of approx 7 and while the power supply +volts rail is less than 7v, the transistor will operate normally. Thus Q2 is wired upside down as in fig. 42 and the simple PUT circuit now performs well with very slight amplitude change over a frequency range of 7 to 1 up to a freq. of better than 100Khz with a medium impedance voltage divider supplying Vx.
- The common way is to lower the impedance of the voltage divider supplying Vx so that it is not affected by the increase in Q2 standing current. Unfortunately R2 & R3 have to be in the low hundreds of ohms to solve the problem, dramatically increasing the power supply current; not good for battery operation.
- A better way would be to replace the lower resistor with a zener diode, as in fig. 40, making sure there is enough diode current to cover any change in current demand by the gate connection.
- An even better way would be to stop the variation in gate current. The varying load on Vx is caused by the small change in Q2 base current from a varying R1, being multiplied by the beta of Q2 to give large changes in Q2 collector current. If we could reduce Q2 beta we would minimise the effect. Ideally it should be reduced to unity. We can do this with a current mirror as in fig. 41. Whatever Q1 collector current is will now be mirrored at Q2 collector, µAmp for µAmp, solving the problem but we had to use another transistor. Surely there must be a way to do it with the existing pair. Instead of using an extra transistor to make a current mirror we will just turn Q2 upside down instead, see Fig. 42.
Now what can we do with the improved PPUJT?
- The most common thing the UJT is used for is a sawtooth generator, see fig. 42. Here the timing cap C1 is charged via R1 to the trigger voltage of the PPUJT which then discharges it and another cycle begins. The sawtooth across C1 will be exponential as the charging current gradually reduces as the cap charges. (The charging current is generated by the voltage across R1, which itself is reducing as the voltage across C1 rises.) If you want a linear sawtooth then you have to charge the cap with a current that stays constant regardless of the voltage on the cap. There are a number of ways to do this. Consider the following:-
- The resistor can be replaced with a constant current device such as a self biased FET or a PNP transistor.
i. In fig. 43 we have a FET which is self biased by R6. As long as there is sufficient voltage across the FET/resistor combination it will operate in the pinchoff region and only let a constant current flow. This will charge C1 linearly. R6 can be made adjustable, to allow the constant current to be varied within limits, allowing the frequency of the sawtooth to be varied somewhat. The impedance at C1 will be high so a buffer of some kind will be necessary if you want to feed the sawtooth to another circuit.
ii. In fig. 44 we have a PNP transistor Q3 set up to feed a constant current to C1. The red LED and R7 provide a fixed bias for the base and RV1 allows the current to be varied over a very wide range. Once again, sufficient voltage must be maintained across the LED/Q3/RV1 combination for correct operation and the impedance at C1 will be high, necessitating a buffer of some kind.
- Now a method that will still provide a constant charging current but will also incorporate a buffer, making it easier to feed the sawtooth to another cct.
If we go back to fig. 42, you could make the charging current through R1 constant if you could keep the voltage across it constant as C1 charges up. This means we would have to raise the voltage at the top of R1 at exactly the same rate as C1 charges. In fig. 45 we have a buffer, consisting of a compound emitter follower using two PNP transistors. Their load resistor is returned to the +v rail. The top of R1 now goes to the +v rail via a diode D3. The emitter follower o/p is connected to the R1/D3 junction by a large coupling cap. Now you can see, that as the voltage across C1 rises, so does the emitter follower o/p, as does the top of R1. Thus R1 always has the same voltage across it producing a constant current through it. Hence a linear sawtooth.
The diode disconnects the +v rail from R1 allowing the voltage at the top of R1 to rise above the +v rail as it faithfully follows the rising voltage across C1. We use PNP transistors in the buffer for two reasons. Firstly, so that any current drained from the coupling cap during the rising part of the sawtooth (it's the coupling cap that supplies the charging current when the diode is reversed biased) can be replaced rapidly during the fall time of the sawtooth. Secondly, so that the rapid discharge of the sawtooth will have plenty of current behind it as the buffer discharges the input capacitance of the following cct.
- Another use for our souped-up PPUJT is a stairstep generator, sometimes called a staircase generator, see fig. 46. Here the charging resistor R1 has been replaced by a voltage doubler cct...? There is a subtle difference, though, in this cct. Whereas a normal doubler has both caps equal in value, this time we make the i/p cap 1/10th the size of the o/p cap. Each time the i/p pulses, the charge on the i/p cap is transferred to the o/p cap. As the i/p cap is only 1/10 the size of the o/p cap it is going to take 10 pulses to fill the o/p cap. But as we only need the o/p cap to go to the trigger point of the PPUJT it will only take 5 i/p pulses. You can see that the voltage on C1 will increase in steps of 1/10 the +v rail and we will get a stair step waveform across C1 with 5 steps. However it will not be linear as the voltage (therefor the height) of each step gradually reduces as the voltage on C1 rises (sound familiar). We will get an exponential stair step, not particularly useful. We will look at two ways of fixing this.
- We could go back to fig. 44 and switch the PNP transistor on and off by feeding in a squarewave to the bottom of R7, as in fig. 47. Thus C1 will be charged by a number of current bursts. Varying RV1 will vary the leading edge slope of each step as well as its amplitude. The problem with this cct is maintaining the stability of the current bursts, especially with temperature.
- Back to the voltage doubler in fig. 46. As previously mentioned, the charge being transferred from the i/p cap to the o/p cap gradually reduces as the o/p cap charges up. (The next sentence is important, read it carefully.) This occurs because the voltage divider ratio, of the i/p cap capacitance value to the o/p cap capacitance value, is applied to the difference between the peak voltage on the DC restorer side of the i/p cap and the voltage on the o/p cap, at the time of each i/p pulse. This difference gradually reduces, hence there is less charge to transfer and the steps get smaller as the o/p cap voltage increases. If we could keep this voltage difference at the same amount then each transferred charge would be the same and each step would be equal giving us a linear stairstep.
So what we have to do is make sure the peak voltage, on the DC restorer side of the i/p cap, moves up at the same rate as the voltage on the o/p cap. Or looking at it another way, as the input pulse waveform pk-pk voltage is constant, if we could make sure the DC restorer reference increases at the same rate as the voltage on the o/p cap, the steps would still be equal. In fig. 48 we have a buffer feeding the voltage on the o/p cap back, as the reference voltage, to the DC restorer diode. Now you can see that as the o/p cap voltage rises, so does the DC restorer reference and hence the peak voltage on the DC restorer side of the i/p cap rises as well. Thus the difference in voltage, between the i/p cap and o/p cap, stays the same and the steps are now always equal in amplitude. If you analyse the cct you will find the resistor load, of the emitter follower buffer, is superfluous and can be dispensed with. Once you do this you will see a diode in series with a base/emitter junction, which itself is a diode so the diode can go as well.
Fig. 49 shows our final linearising circuit, which is relatively simple and also quite stable. The emitter conducts as soon as the i/p signal tries to swing 0.6v more negative than the base. This clamps the negative peak of the waveform on the i/p cap to a voltage which is always 0.6v below the o/p cap. If you want to change the number of steps in the o/p waveform, there are a couple of things you can do.
i. Vary the ratio of the i/p cap to the o/p cap, either by switching in various values of i/p cap, or use a variable trimmer cap, as shown in fig. 50, for the i/p cap. (It doesn't pay to vary the o/p cap as the droop, of the voltage that forms the top of each step, may increase as you decrease the o/p cap's value. This is because the o/p cap has to provide the current to drive any subsequent cct.)
ii. Vary the pk-pk amplitude of the i/p pulse waveform, using a trimpot or something similar as in fig. 51. But remember the risetime, of each step in the o/p stairstep waveform, relies on the ability of the i/p pulse to rapidly charge the o/p cap, so the lower the input pulse impedance the better.
A simple exclusive-or gate when you haven't got one.
The ex-or function always seems to be too complicated to remember but it is actually quite simple, as follows :-
If the inputs are always the same, the gate gets bored and its spirits feel low, so its output is low.
Or the other way round. If the inputs are different the gate feels great, its spirits are high and so its output is high.
Sometimes, when designing a circuit, Murphy wins the day and the number of ex-or gates you need, is one more than the multiple of four that fits neatly into a number of ICs you've got. Here's a couple of ccts just for this occasion :-
- Fig. 52 shows a real ex-or gate for truth table comparison.
- Fig. 53 shows a simple ex-or gate. D1,2,3,4 form a fullwave rectifier to convert the different voltage level inputs to the same o/p polarity to turn on Q1 and it's collector will go high. If the inputs are the same Q1 will turn off and its collector will fall.
- Fig. 54 shows a simple ex-nor gate. This time the collector falls if the inputs are different and rises if the inputs are the same.
The CMOS 4070, a very useful IC.
I think the 4070 is a terrific IC. As well as its normal ex-or function it has many others which may not be obvious at first glance.
Besides its digital operation, it works very well in the analog world. Its internal structure produces a string of invertors between its input pins and the o/p. No less then five invertors in series giving it a very high gain. So high in fact that when running on 6v its inputs only need 4mV to cause the o/p to swing from one rail to the other. The trick is not to run it on a voltage any higher than 6v. If you run it above 6v it will start to oscillate on slow inputs but on 6v it is as gentle as a mouse.
One word of warning! I'm talking just about a 4070, NOT a 4030.
A 4030 may be a digital equivalent of a 4070 but it is NOT an analog equivalent of a 4070.
A second word of warning. All my experiments were carried out with 4070s branded Motorola. I'm not sure if other brands will work as well as Motorola did. Try them. I used to think that all ICs were the same, regardless of the different brands, but I've noticed, from various data sheets, that, while the function of the ICs may be the same, the internal circuitry may not and as we are not using the IC as the maker intended, this becomes important.
The previous infomation was based on the 4030s and 4070s that I experimenyed with in the early 1980s. Since then the IC manufacturers have improved the low voltage operation of the 4000 series. Unfortunately this means the 4070 even running on 5v is about as gentle as a mouse on steroids. Like the 4030 it has a tendency to oscillate if the gate inputs sit at the very sharp threshold for any length of time. There are various tricks to tameing it as follows:-
- Which signal is fed to which i/p has a big bearing on the tendancy to oscillate.
- If the i/p transition polarity will cause an o/p transition of the same polarity, put that signal in the i/p pin next to the o/p pin.
- If the i/p transition polarity will cause an o/p transition of the opposite polarity, put that signal on the i/p pin furthest away from the o/p pin.
- If that doesn't work put a small cap from the o/p to ground. Around 470pf will do. Use the smallest value that will stop it oscillating. Remember this extra capacitance will slow down the o/p transition rise & fall times. I've marked this cap with an * where ever I've put it in a cct.
- As a last resort connect two resistors to the gate in the schmitt trigger configuration. This will usually fix it and give fast o/p rise & fall times as well.
- If it still oscillates try a different brand of IC then give up.
A number of these circuits make liberal use of resistors, which can make the digital levels soft and will slow down the circuit operation, so dont expect full digital speed. You may get full speed, just dont expect it. The lower the resistor value the faster the speed but 10k ohms is about the lowest practical limit. If you use lower than this you're on your own.
- A voltage controlled invertor. See fig. 62 . If you look closely at the truth table for an ex-or gate and consider one input as the signal i/p and the other as the control i/p, then when the control i/p is low the signal is conveyed to the o/p unchanged but if the control i/p is high the signal is inverted.
- Switchable delay. See fig. 63 . Using the previous function, a delay can be switched on or off by simply making the signal i/p to the ex-or gate have a mark-space-ratio such that one edge of the pulse occurs at zero time and the other edge coincides with the delay time. If you arrange the following IC to look for, say the positive edge of the o/p, then with the gate as an invertor one timing edge will be positive going and with the gate as non-invertor the other timing edge will be positive and you can change it with the flick of a switch.
- A Schmitt trigger. See fig. 64 . In this cct the ex-or gate is running in the non-inverting mode. We have an i/p resistor and a feedback resistor. Being a non-invertor the feedback will be in phase with the i/p and will cause the o/p to have a snapping action called hysterisis. Basically this means the input must go slightly above the threshold to switch the gate high and slightly below the threshold the switch it back to low again. From this you can see that the i/p signal must have a certain amplitude before the gate o/p will switch. One advantage this cct has over the real CMOS schmitt-trigger (4584) is that this cct's thresholds are predictable whereas the real one's are not.
Assume the threshold of the gate is exactly on 50% and it's sharply defined. Assume R1 & R2 are equal. This will produce the maximum amount of hysterisis, that is , it will take an i/p signal swing equal to the rail voltages to get the gate to switch.
Using fig. 65 we'll start with VR2 wiper exactly halfway, VR1 wiper at 0v, the gate i/p at 0v and the o/p at 0v. The power supply +volts rail is 10v, this means the gate threshold will be at exactly 5v. As VR2 is halfway, the i/p res will equal the feedback res. Slowly increase VR1. When its wiper reaches 1v, the gate i/p will be 0.5v due to the voltage divider action of VR2. When VR1 reaches 5v the gate i/p is at 2.5v. When VR1 gets to 9v the gate i/p is at 4.5v, and it still doesn't switch. When the VR1 reaches 10v the gate i/p reaches 5v and the gate o/p switches high, making the gate i/p now 10v.
Pulling VR1 wiper down now, when it reaches 5v the gate i/p is at 7.5v. When VR1 reaches 1v the gate i/p is down to 5.5v but still doesn't switch. Finally When VR1 reaches 0v the gate i/p reaches 5v and the o/p switches low. Thus it took an i/p swing of 10v to make the gate switch. This is 100% hysterisis.
This is all very well for the perfect gate with infinite gain but what about a real one which takes 5mV i/p to fully swing its o/p from rail to rail. You might think it wont work, as the gate i/p voltage wont get that 2.5 mV above the threshold necessary to operate the real gate. Consider the following. The o/p is low. VR1 wiper is at 9.995v, that is 5mV below maximum. The gate i/p will be at 4.9975v or 2.5mV below the threshold. Increase VR1 to 9.996v, the gate i/p will be 4.998v, 0.5mV into the linear transfer characteristic of the gate. The gate will amplify this by about 1000 and the o/p will go up to 0.5v. As VR2 is half way, half of this 0.5v will be fed back to the gate i/p which it will rise 250mV, well and truly switching the gate and its o/p will snap fully high. So it does work but it means there is a minimum limit we can reduce the hysterisis to. (Of course in a real gate the gain varies with the i/p voltage but you get the idea.)
Back to our perfect gate. So with VR2 at 50% we get 100% hysterisis and the i/p signal must equal the supply rails. Let's set VR2 to 10%, that is, the feedback res is 9 times bigger than the i/p res. Starting with everything at 0v, set VR1 to 1v. The gate i/p will be 0.9v due to the voltage divider action of VR2 which now only attenuates the i/p signal a small amount. When VR1 reaches 5v the gate i/p is at 4.5v and no switching. When VR1 reaches 5.5555v the gate i/p will reach 5v and the o/p will switch high. The gate i/p will now be at 6v. Now that the o/p has gone high any higher i/p voltage from VR1 will have no effect.
Assume all the voltages are at 10v. Reduce VR1 to 5v, the gate i/p will be at 5.5v and the o/p will still be high. Wind VR1 down to 4.4444v, the gate i/p will reach 5v and the o/p will switch low. The gate i/p will now be at 4v. Now that the o/p has gone low any lower i/p voltage from VR1 will have no effect. Subtracting the lower VR1 reading from the upper one gives us 1.1111v hysterisis. This means it will take an i/p signal of at least 1.1111v peak-to-peak to make the gate switch. By using VR2 to adjust the ratio of the i/p res to the feedback res we can vary the hysterisis from full supply rails to about 5mV.
- A high gain amplifier. Fig. 66 shows the normal cct. Its basically the same cct as the previous one except the ex-gate is running as an invertor. While this cct looks great in theory it doesn't work in practise. The IC gain is so high the amp just oscillates. Fig. 66b shows a cct that does work but you only get a gain of about x5. You can cascade more than one amp to get more gain. Try any of the inverting gates in this cct. You might find one type that will give more gain without oscillating.
- A high gain analog comparator. Albeit one with only one variable input and the other fixed at a particular voltage, typically at 50% of the power supply +volts. Figs. 67,68 show how to get round this particular limitation. These two circuits can be combined as in fig. 69. The advantage here is that you can switch from inverting to non inverting without rewiring the cct. But as with all things some ccts work better than others. All this gain is contained within only three pins on the IC. As there is always some leakage and capacitance between pins on an IC you can minimise trouble by using certain pins as signal i/p.
- If you are going to use it as a non-inverting comparator then wire the input signal to the input pin closest to the o/p pin. Any feed back on a non-invertor will be in phase with the i/p and cause a small amount of hysterisis which will make the o/p snap a little better between power supply rails.
- If you are using it as an inverting comparator or a self biassed high gain amplifier, put the input signal on the i/p pin the furthest from the o/p pin, as the control signal on the i/p pin closest to the o/p pin will shield the signal i/p pin from the o/p pin and minimise any feedback which, in this case, may cause oscillation, though it shouldn't happen with a 6v supply.
- Inverting Integrator. See fig. 70 . Here we have the 4070 biassed, as a linear inverting amplifier, by R2, a 1meg feedback resistor. R1 & C1 set the time constsant for the integration. As the 4070 has an open-loop gain of about a 1000, R1 should be no lower than 10k ohms. Similarly this high gain will cause the integrator to oscillate so a cap, marked with an asterisk, is connecred to ground to stop it. R1 is 10k, C1 is 0.01uf and the asterisk cap is 0.047uf.
- Operating the 4070 on 6v or less when the other ICs are on more. See fig. 71 . Here we have a 5.6v zener across the IC with 330 ohm resistors to +volts and ground. Tiny signals will show up on the supply pins as the o/p current has to come through the 330 ohm res. This is why you should bypass the IC ground pin to actual ground with a capacitor as these signals will interfere with the internal threshold level of each gate in the IC. Fig. 72 shows a better way. This time we have two red leds in series with each of the power supply pins, the resistor sets up a bias current of 6 mA for the leds to lower their impedance. Depending on the diodes you may be able to reduce this current. This cct probably wont need any bypass caps due to the low impedances of the leds to the supply rails. Use two sets of two red leds for a 12v supply, two sets of single green leds for a 10v supply, two sets of single red leds for a 9v supply, then switch to normal silicon diodes for lower voltages and so on. Make sure the 4070 supply is balanced around the centre of the supply rails so as to maximise the noise tolerance of the cct.
- Auto-polarity convertor. See fig. 73 . I first saw this cct in an IBM b&w computer monitor. As you may already know, a computer can switch the resolution setting of a monitor, if the monitor has the capability. There are two synch signals fed to the monitor along with the R.G.B vision signals. The polarity of these synchs are switched by the computer to tell the monitor which resolution setting to pick. There can be four combinations of polarities hence the monitor can only select four reso settings. Functions 1 & 3 are used together in one ex-or gate to sense which polarity is selected and automatically correct the polarity so that the monitor synch ccts can function correctly.
If you look at fig. 73 you will see that a synch signal spends most of its time high if it's the normal negative polarity or low if it's inverted. The incoming synch is fed straight to the signal i/p of the 4070 and through a long time-constant integrator to the control i/p. If the i/p synch is negative going then the integrator will charge up to a high and the gate will be an invertor for the signal i/p giving us a positive going o/p. Whereas if the i/p synch is positive going the integrator will discharge to a low and the gate will be a non-invertor for the i/p signal giving us a positive going o/p. So we always get a positive going synch o/p and the level on the control pin tells us the opposite of what polarity is coming in.
- A simple frequency doubler. See fig. 74 . But thats the same cct as fig. 73 I hear you say. Quite correct, it is, but this time we feed in a square wave and the integrator is now a short time-constant one and with a bit of luck the o/p will be a square wave but at twice the i/p frequency.
The integrator basically delays the i/p square wave by 90 degrees before applying it to the control i/p. Remember the o/p is low when the i/ps are the same and high when the i/ps are different. Apply this rule to the waveforms and you get a double speed squarewave o/p. The main limitation of this cct is that it cannot handle a wide range of frequencies and the o/p square wave may not have a 50% mark-to-space ratio.
- A wide range frequency doubler. See fig. 75 . Here we use another gate as a high gain inverting integrator. This feeds a nice triangle wave into the control i/p of the next ex-or gate giving a more accurate 50% squarewave o/p. This is where the high gain of the second gate comes into its own by being able to square up the triangle even as its amplitude drops as the i/p frequency increases giving quite a respectable range of operation. The coupling cap C2 and feedback res R3 allow the second i/p to self bias. C2 is 0.47uf and R3 is 1 megohm.
- A simple SR flipflop. Well it's actually an S notR flipflop see fig. 76 . The ex-or gate is setup as a non-inverting latch and is pulsed high by a positive pulse and low by a negative one. As with all SR flipflops it can only tolerate a pulse on one input at a time.
- A simple TV sync seperator. It is actually an active DC restoring unidirectional clamp with an o/p which approximates the sync section of the i/p composite TV signal.
First a bit of AC/DC theory. If you pass a waveform of any shape through a capacitor resistor coupling circuit of sufficient size so as not to distort the waveform shape, the o/p will have any DC level of the waveform removed. The o/p waveform will settle itself with its average level sitting on the reference level fed into the bottom of the resistor. See fig. 77 . The area above the average line will equal the area below it. So if we consider a normal sinewave i/p that has enough DC level to make the bottom peak just sit at ground potential then the o/p waveform will have half the amplitude above the reference and half below it. The DC will have been removed. If nothing changes in the waveform then it will sit this way for ever. If we want to get the o/p waveform the same as the i/p (restore its DC level) we will have to raise it somehow.
The trick is to place a diode across the resistor so that when the sinewave tries to swing negative with respect to the reference (ground in fig. 78 ), the diode will conduct and clamp the negative peak to ground by charging the o/p side of the capacitor to a DC level which will raise the o/p waveform by the appropiate amount. Or so the theory goes. Unfortunately a normal diode needs about 0.6v to make it work so the negative peak of the waveform will not rise all the way up to ground but will sit 0.6v below it, as in fig. 78 . The diode only conducts for a short period of time necessary to charge the cap. The rest of the time the resisitor is draining away the charge, on the cap, to the reference. This leakage has to be made up by the diode conducting on every negative peak. If the leakage is too severe, the waveform, which has to supply the current, will distort by flattening the smooth curve on the bottom peak so the resistor must have a value as high as possible.
What happens if we remove the diode and feed in a square wave? See fig. 79 . It will act just like the sinewave and settle with half the waveform above reference and half below. But if we change the mark-space-ratio away from the 50% of a squarewave to say 20% of the time low and 80% high, the o/p waveform will float to a new level so that the area above reference still equals the area below. This means the o/p amplitude will be 20% positive and 80% negative. If we reconnect the diode, as in fig. 80 , it will pull the negative peak of the waveform back up to within 0.6v of reference.
Now let's remove the diode and feed in a normal TV waveform, see fig. 81 . As the images from the TV camera, and displayed on the screen, keep changing, the waveform will keep floating up and down as it tries to keep the same area above the reference as below it. For instance, assume we are at an airshow and the sky is cloudy. The USAF is showing off an SR71 "Blackbird". The camera is on wide angle to pick up the plane as it approaches. The picture is all clouds and the plane is just a tiny black dot. Most of the video is at 100% peak white. As the plane approaches the camera zooms in to a close shot showing us the underneath of the "Blackbird". Now no clouds are seen, just the dark underbelly of the aircraft. Most of the video will be at 10%. This is a massive change in the average level of the waveform and it will float up quite a lot.
If we had set the brightness of out TV set to a particular spot on the waveform (the designated blacklevel) this floating around would keep changing the brightness of the picture causing great annoyance. This is why the DC level of the signal has to be restored to stop the float. Lets reconnect the diode as in fig. 82 . Hey presto the float steadies down BUT notice how the signal sometimes jumps high but only floats down. This is due to the fact that the diode can only conduct when the signal jumps down. When it jumps up the diode is reversed biassed and only the resistor has any effect on the waveform. but we made it large so it wouldn't distort the waveform. Now we have to make it small to cause the waveform to float down faster and keep the signal hard down against the diode. A compromise is required. You have to balance slow operation against some distortion of the syncs. Well, at least we can do something about the voltage drop across the diode.
Well, what can we do about the diode voltage drop? Lets use an operational amplifier (op amp) and put the diode in the feedback loop. Its normally in the negative side of the loop, that is the op amp runs as a high gain inverting amplifier. Well, we have one of those in our ex-or gate, dont we? Not really as it comes with a serious side effect, oscillations, and as the cct has to operate at high speed we cant use the trick of putting a cap to ground from the o/p. However we can use a 4069 invertor in its place. It has a very high i/p impedance and the resistor can be whatever value it has to be and the gate wont load it down so its not a complete disaster. See fig. 83 . The main thing with this cct is that you use the pot to make sure the signal will swing across the threshold of the ex-or gate otherwise it wont start working. As you can see the sync part of the signal swings negative and forces to gate o/p positive. The diode tries to pull up the cap but the instant it gets 3mV above the threshold, the gate output falls. It soon settles down with the sync tips a few millivolts below the gate threshold. The o/p, which is basically positive going syncs, swings between one diode drop above the threshold during the sync tips and down to ground during the rest of the signal. As the gain of the 4069 is not very high there will be some remnants of the video still on the negative part of the output.
As this o/p is not high enough to reliably drive any other digital ICs there are two things you can do the help the situation.
- First feed the output into another ex-or gate to bring it up to full digital level as in fig. 84 . This also allows you to make the sync o/p positive or negative going at the flick of a switch.
- A cheaper alternative is to put another diode in series with the one already there, as in fig. 85 . The gate o/p will increase automatically to drive this diode string and now will swing between 2 diode drops above the threshold and ground. Easily enough to drive other non ex-or gates.
- A more complex TV sync seperator with a bi-directional video clamp. See fig. 86 . I designed this cct some time ago and more recently put it in a colour fader project in a leading Australian electronics magazine. In this cct the video clamp is bi-directional, that is, unlike the previous cct, which can only hold the signal from floating in one direction, this one can stop the signal from floating up or down and there is no signal distortion as there could be in the other cct.
Here, using a CMOS switch, we clamp the signal to a potential just below the threshold of the ex-or gate. A complementary compound emitter follower isolates the high impedance clamp from the rest of the circuit. Using both PNP & NPN transistors guarantees almost no DC offset between i/p and o/p. The resistor across the CMOS switch allows the signal to swing across the ex-or gate threshold and start up the cct. Once the CMOS switch is operating this res has little effect on the operation of the clamp.
The ex-or gate is running in the high gain inverting comparator mode so when the negative going sync portion of the TV signal swings down through the threshold, the ex-or o/p goes high turning on the CMOS switch. This clamps the ex-or side of the i/p capacitor to the pot potential. The pot is carefully set so that the threshold slices through the syncs at a point above the bottom tips but below the colour burst. As this difference amounts to only 143mV in a normal 1v TV signal, you can see why we need the high gain of the 4070. The o/p of the ex-or gate is full voltage positive going syncs.
C1=0.1uF, R1=1megohm, R2=15k, R3=330ohm, VR1=5k. Every time I've built this cct it has worked very well but there are a couple of tricks that will make it work better if the incoming TV signal is a bit crook.
- Firstly put a RC integrator at the i/p of the ex-or gate, as in fig. 87 . A 10k ohms with a 33 pF cap will probably do. This will filter out the colour subcarrier burst and give you access to the whole amplitude of the syncs, hopefully making the pot setup less finicky, but dont get too willing with the integrator values, otherwise you will ruin the rise time of the sync pulses and they will get shorter at the o/p.
- The second trick is a bit cheap and nasty. Un-terminate the video feeding the i/p, as in fig. 88 . This will double the video amplitude to about 2v giving even more leeway but if the cable feeding the video is too long you may get reflections on the pictures and funny extra pulses in the sync o/p but on cables up to 20ft it should be ok.
- Power-on reset pulse generator. See fig. 89 . In this cct we arrange that, at switch on both i/ps of the ex-or gate are low therefore the o/p is low. After a short time one i/p goes high therefore the o/p will go high. A short while later the other i/p goes high and the o/p goes low and stays that way until the power is turned off and the cct resets.
One i/p of the gate has a cap, C1, to ground. The other i/p has a res, R1, to +volts. The two i/ps are connected together by a diode, D2. On switch-on C1 is at ground potential and so one i/p is at ground. R2 is pulling the other i/p high but can only manage + 0.6 volts as the D2 holds it down. As the cap charges you can see that the upper i/p will always be 0.6v above the lower i/p. The upper i/p will reach the threshold first and the o/p will go high. After a period of time the cap will charge a further 0.6v and the lower i/p will reach the threshold and the o/p will drop. The o/p will stay this way until the power is turned off and the second diode discharges the cap ready for the next switch on.
Remembering the connection rules I mentioned at the begining of this section, connect R1 to the i/p pin next to the o/p pin and C1 to the i/p pin furthest away from the o/p pin.
A more elaborate cct in fig. 90 allows more accurate setting of the timing of the edges of the o/p pulse.
In this cct the ex-or gate has a different RC time-constant connected to each i/p. When the power is switched on, both capacitors will have no charge, therefore the gate i/ps will be low and the o/p will be low. After a time period, set by the shortest time-constant, passes, one i/p will go high forcing the o/p high. A short time later the long time-constant cap will charge, the 2nd i/p will go high and now the o/p will go low and stay that way until the power is switched off. The diodes discharge the caps as the power goes off. The rise and fall times of the o/p pulse will not be digital speed but will still be pretty fast. Connect the shortest time-constant to the i/p pin next to the o/p pin.
A slightly more elaborate cct again in fig. 90b produces a faster leading edge on the o/p. R3 & R4 provide hysteresis to speed up the output transition but it will only work on the positive going edge therefor R2/C2 must be the shortest time-constant.
- Delayed pulse generator. See fig. 91 . We use the same circuit as in the previous section but remove the diode cathodes from the +volts, join them together and use this junction as the i/p. If a negative pulse of sufficient length is simultaneously fed into both time-constants via the diodes, the caps will discharge and the the o/p will produce a delayed pulse as described in the previous section. There are two possible problems with this cct.
- The cct starts out with both i/ps high. This gives a low on the o/p. The i/p pulse pulls both ex-or i/ps down simultaneously so the o/p is still low. Simultaneously is the operative word. If there is the slightest difference in the time both ex-or i/ps drop the o/p will go high momentarily; this we do not want. This momentary positive spike will be very short and hard to see. We can minimise it by making C1 equal to C2. An * cap on the o/p may also fix it.
If the problem still exists fig. 92 shows a possible fix. Here the o/p is fed through a 2.2k resistor R3 and the input pulse holds the o/p low via D3 until both ex-or i/ps are low.
- As the 4070 is just running in the 'a la naturale' high gain mode, the o/p transitions will not be at digital speed. We can improve the speed by making the ex-or gate function as a schmitt trigger as in fig. 93 but only for the positive transition. This also means R2/C2 must be the shortest time-constant.
- Fig. 94 includes both these improvements.
- A half monostable. See fig. 95 . Here we use the ex-or gate in its schmitt trigger garb with the hysterisis set at 5%, that is R3 is 20 times bigger than R2. The positive input pulse charges the cap, the ex-or gate snaps high and the cap discharges slowly through the resistor until the gate reaches the lower trip point and it snaps low again. The o/p pulse will be positive going.
In fig. 96 we re-arrange the cct so that a negative input pulse discharges the cap then it charges back up again through the res. This time the o/p pulse will be negative going.
Both these ccts are re-triggerable, have good fast rise and fall times and have the usual limitation of half monostables:-
- The i/p pulse must last long enough to fully charge or discharge the cap if you want repeatable o/p pulse lengths.
- The i/p pulse must be shorter than the time-out period.
- The i/p pulse is added to the o/p pulse so any change in the i/p pulse length will change the o/p pulse length.
You could build them without the schmitt trigger by just running the ex-or gate 'a la naturale', as in figs. 97,98 . This would let you select which o/p polarity you wanted but by doing this you would be relying on the gain of the gate to square up the slow ramp of the cap as its charge decays. The o/p pulse leading edge would be ok but the trailing edge, and thats the one you usually want, will be a bit slow, but if you can put up with the slow edge then way you go.
- A full monostable. See fig. 99 . Well it's almost a full monostable. The i/p pulse can be very short but it must be shorter than the o/p pulse width. R2 provides feedback from the o/p to one i/p to make a latch. D1 allows us to feed in a positive pulse. R1,C1 make up the timing cct. D2 allows the rapid discharge of C1 when the o/p goes low. Assume both i/ps and the o/p are low. We feed in a short pulse via D1. The o/p goes high. The i/p pulse can now disappear as R2 will keep that i/p high. The o/p high slowly charges C1 until the 2nd i/p goes high. The o/p goes low. Both i/ps go low keeping the o/p low till the next input pulse. The output of this circuit may have a kink at the 50% point on the trailing edge.
For a retriggerable version see fig. 100 . This cct is better than the half monostable shown in figs. 95&96. Here the o/p transition is coupled back to the i/p and speeds up the o/p transitions. The i/p pulse must be shorter than the time-out period but wide enough the allow the cap to completely charge or discharge. R1 C1 sets the time period and R2 is there to disconnect the cap from the o/p, allowing fast o/p transitions. R2 should be about 2.2k.
- An oscillator. See fig. 101 . This is basically a new version of that old favourite, the phase shift oscillator. Each RC section delays the o/p by about 60 degrees, so three will produce 180 degrees. Add this to the 180 provided by the ex-or gate running as an invertor and you have 360 degrees. In other words positive feedback, an oscillator. The o/p is a pretty good squarewave. If the res are 100k and the caps 1000pf then the output freq is about 5000 cps.
- A push-on push-off alternate switch. As the previous cct must have a defined i/p pulse-width it cant be used with a manually operated push button. There are two ways to go:-
- Fig. 102 shows how two ex-or gates in their invertor mode, are wired to produce a latch with complementary o/ps. The switch is used to transfer the charge on C1 to the input of gate1. As the cap always has the opposite polarity of gate1 i/p, the cap will force the latch to change state. The resistor values are chosen so that when the button is pressed, the current from R1 will not interfere with the latch operation. This stops the cct from oscillating when the button is pressed but dont make the R1C1 time-constant too large as this limits how fast it can alternate.
- fig. 103 shows a different way. Here one ex-or gate is configured as a non-inverting latch and the other as an invertor. As in the previous cct the cap always has the opposite polarity to the latch and will force the latch to change state when the button is pressed. The resistor values are chosen so that when the button is pressed, the current from R1 will not interfere with the latch operation. This stops the cct from oscillating when the button is pressed but dont make the R1C1 time-constant too large as this limits how fast it can alternate.
- A divide by 2. See fig. 104 . This circuit is very time sensitive. The time constants must be matched to the i/p pulse width. Assume both i/ps are low and the o/p is low. We feed in a 1 mSec pulse. The o/p goes high and C1 charges via R1 but C2 has not yet charged via R2. The i/p pulse disappears and the gate o/p goes low momentarily. C1 begins discharging via R1 but C2 has charged to the gate threshold via R2 before C1 discharges. The gate o/p goes high and stays there charging both C1 and C2 fully high.
We feed in another 1 mSec pulse. The second i/p goes high, now both i/ps are high and the o/p goes low. C1 begins discharging but C2 has not yet discharged via R2. The i/p pulse disappears and the gate o/p goes high momentarily. C1 begins charging again but C2 has now discharged below the gate threshold via R2 before C1 charges. The gate o/p goes low and stays there fully discharging C1 and C2.
As the ex-or gate o/p is bouncing all over the place and the digital levels on C1 are very soft you should feed the next gate from C2, but remember it is not a low impedance o/p and the edges are slow.
- A better divide by 2. This time we use two gates. In fact any gates, wired up to invert the input, will do. In fig. 105 we cross couple two gates with R3 & R4. This provides the basic bistable. D1 & D2 are used to gate the input and R1C1 & R2C2 provide the steering. The caps are used as a temporary memory to hold the current state of the bistable as it switches to the alternate state. R1 & R2 must be larger than R3 & R4, typically 10x. The timeconstants R1C1 & R2C2 set the max speed of toggle thus the smaller the better. R3 & R4 will be around 4.7k and R1 & R2 will be around 47k. C1 & C2 will be around 47pf.
fig. 106 shows a different way to trigger and steer the bistable. Here we use the 4070s in their voltage controlled invertor mode. The control inputs of the gates are pulsed to 0v very briefly, relying on the input capacitance and propagation delay of the gates to provide the temporary memory. The input pulses must be very narrow and have fast rise/fall times. Small caps can be fitted to the i/ps to raise the i/p capacitance and allow slightly wider i/p pulses.
Making a simple CRO see low speed narrow pulses.
While setting software time-constants I ran up against the problem of trying to see 0.5 usec pulses at a repetition rate of 100 pulses per sec on a normal simple CRO, that is, one without a delayed sweep. This little circuit produces an o/p pulse which changes duration depending on the speed of its i/p triggers.
What colour is White?, or to be more precise what colour is the White on our TV sets?
That sounds like a stupid question, doesn't it. Every one knows what colour white is, dont they. Or do they? Consider the following.
The colour of White depends on :-
There may be more but this is quite enough for now.
- The solar system we grew up in.
- The solar system we live in now.
- The planet we grew up on.
- The planet we live on now.
- Where on the planet we grew up.
- Where on the planet we live now.
- The fact that our planet is a sphere.
- Lord Kelvin and the little black cube.
- The speed of electrons racing round the nucleii of atoms.
- The make up of our retina.
- The pre-programming of our brain as determined by our DNA.
- The fact that our planet is infected by a species that likes to pollute.
- The fact that a lot of bushland needs a forest fire to rejuvenate.
- The fact that there are a lot of active volcanos.
Back when I was in my early teens Black & White television started in Australia. The original TV sets came with either 17 or 21 inch screens, had around 20 valves and cost about £250, 20 times the average weekly salary, compared to todays salaries that's around $14,000. Being so expensive they quickly became status symbols. Of course most of the sets were bought on the 'never never'; you never finished paying for it so you never owned it. When going visiting in the evening we used to walk a bit over a mile to our relatives place. The average house block was only 35ft wide so we had to walk past a lot of houses. As we turned into each street it didn't take long to see that most of the houses only had the orange glow of incandescent lamps in their windows, but a few, very few, had a bluish flickering light spreading on to the front lawn. When we walked passed these houses, we could see the occupants sitting in the lounge room watching a box with a flickering bluish screen. They had TV and they wanted everyone else to know it. Hence the blinds and curtains were wide open. Ah! to be the first in the street with that bluish flickery glow.
'Us poor people', who couldn't afford one, would slow down as we walked through the shopping centre and dawdle past the radio & electrical shop which usually had a TV operating in the window. You would always find 3 or 4 people standing in front of the shop window eyeing the 'goggle box'. When you first started watching, you would notice the bluish-white colour of the picture, but after 5 minutes you seemed to forget about it and, from then on, only saw black & white pictures. If it was a big shop it might have 2 or 3 sets running on different channels. Now you noticed that each screen might be a different coloured bluish-white, depending on who made the set. The colours were all variations of blue as the blue phosphor was the most efficient. The picture-tube manufacturers had to use a majority of the blue phosphor chemical in their final white phosphor mix if they wanted to produce a maximum amount of light for the smallest amount of picture-tube beam current possible. Remember set designers were trying to minimise the number of valves (they were expensive) and the various circuits only just worked. There was only just enough ultra high voltage current to run the picture-tube so the tube makers had to make every electron of beam current count. There really wasn't any thing left over. It is a mark of their brilliance that the set designers eventually got the number down to 14 valve sections. That's only 14 active components. By comparison modern semiconductor black & white sets have hundreds of active components, most of them hidden in a few ICs.
This schemozzle continued when I began to work at the TV station. Monitors came from various manufacturers and all looked slightly different. We tried to make sure that only one brand was used in each room to solve the multicolour problem but this was not always possible. Eventually colour TV came along and opened the "What colour is white?" can of worms and forced us to find an answer. Unfortunately Australia didn't do the answering. We left it up to the British Colour Television Committee to work out what colour white was. Their answer suited Britain and Europe but not Australia and we've had to put up with it ever since.
Well, what colour is White? The short answer is "I dunno". A slightly longer answer is "it depends on who's asking the question". If it's a house-wife asking an advertising executive "What colour white will my clothes be after I wash them in brand XYZ washing powder?", the answer will most probably be "whiter than the other brand". On the other hand, if it's the interrogator from the Ministry of Love in "1984" asking a poor unfortunate, "What colour is white?", the answer will be "What colour do you want it to be?" Both of these answers are much closer to the truth than you would think. After working 25+yrs in a colour TV Station I thought I new the answer but it appears I dont. The more I delved into it the more sticky it got. The following is my opinion on the matter. It might be true or more likely its just a load of rubbish, see what you think. If you want a headache, be my guest and read on :-
What colour is White? Well, believe it or not, there is no such thing as white light. It is just an optical illusion, literally, a trick performed by our brains. It's just something we think we see when we look at light which contains all the primary colours. The retina in the back of our eye, our built in camera tube if you like, is made up of light sensitive cells that appear to see only 3 colours. Low frequency spectrum energy which we call Red. Middle frequency spectrum energy which we call Green, our most sensitive colour. High frequency spectrum energy which we call Blue. These 3 frequency spectrums overlap to give us a continuous coverage from deep red to high blue with a broad hump at green about twice as high as at red and blue. Our DNA has prewired our brains so that when all three colour sensors are stimulated, we see white. Live theatre stage lights have long used this trick of our brains to improve the spectacle of looking at a stage. Most of the white light on a stage isn't. A small amount of white lamps are used and the rest of the light comes from narrow band red, green, blue, cyan, magenta and yellow filtered lamps shone in at different angles. The brightly coloured clothes of the performers look different under each of the different coloured lamps and hence are continuously changing as the performers move around the stage. We the viewers think we see the stage illuminated with white light but the technical definition of white light is light that has a continuous spectrum from deep red through green to high blue. (Please remember, throughout these descriptions, we are talking about light, which uses the primary colours of red, green and blue in an additive process to get white. Not printer's ink which uses primary colours of yellow, cyan and magenta in a subtraction process to get black. See tri-colour chart. Paint works similarly to printers ink, but the artists have confused the issue by not calling paint colours by their correct names and paint manufacturers keep the artists happy by making paint colours to suit the artists. You will find it very difficult to buy either cyan or magenta paint.)
Now depending on how much red-relative-to-green-relative-to-blue signal there is, our brain will slightly colourise the white. An excess of blue will make the white look bluish-white. An excess of green will give greenish-white and an excess of red will give a reddish-white or pink. This was accomplished by our brain's automatic white balance. (Read the next sentence carefully.) By this I mean if we see a bluish-white our brain adjusts its sensitivity to each colour to bring the perceived white colour back to a pre-concieved notion of what we recognise as white. You can easily prove this by staring at a sheet of pink paper for a few minutes then look at a white sheet of paper. For a short while the white sheet will look cyan, a bluish-green, then fade back to white as the auto balance recorrects. By this slight change in the colour of white we decide how white something is. It's this auto white balance that causes problems when we're in the park, taking a picture of our girlfriend leaning against a tree. Everything looks great to us at the time but when we get the pictures back, she has green under her chin, courtesy of the light reflecting up from the green grass. We didn't notice this as our built-in auto white balance had corrected for it. Try this test.
Unfortunately we cant turn this auto white balance off, but we can fool it. In the telecine sections of TV stations the film transfer machines have the capability to change every colour in the picture. This means there has to be some way for the operator, now called a colourist, to put their built in auto white balance on hold or it would completely ruin their perception of the film being transferred. For instance if the processing lab had mucked up the developing of the film and it had a green cast throughout and nothing was done about the colourist's auto white balance, after a few minutes of watching the film, the colourist would not see the green cast any more and would cease correcting it. A clever idea is employed to brow-beat the auto white balance into submission. A large white plastic screen with a cutout for a 19 inch monitor is placed around the monitor and illuminated from behind with special lights having the reference colour temperature. The area of the plastic screen is about six times the area of the picture monitor. This is big enough to make the colourist's auto white balance adjust itself to the plastic screen colour and let the colourist's eyes see the film as it really is.
Where did we get this preprogrammed White? While we were very young we saw the ever present clouds in the sky. They are the whitest things around and are illuminated by what we call daylight, that is yellow sunlight, after it has passed through the atmosphere, mixed with a lot of blue skylight. We got used to seeing this and it became the white reference for our auto white balance. Any one over 50yrs old will remember that all the bed sheets used to be linen and white. As they were used and aged, they slowly lost their crisp whiteness and went towards a creamy white, the natural colour of cotton. The over 50s will also remember what their mother did to restore the whiteness. She soaked the sheets in a tub of hot water in which a "knob of Bluo" had been dissolved. The blue hot water infused the cotton sheets with a mild blue colour. Here is where our built-in auto white balance kicked in. We looked at the mild blue white and our auto white balance pulled the blue out of the sheet colour and as all auto systems must leave a small percentage of the original error in place (to stop them oscillating) our brain saw a bluish-white which it told us was whiter than before. Now if you keep adding blue to the sheets eventually the auto white balance runs out of correction range and you start seeing light blue instead of bright white. Your brain no longer says its seeing white. So a touch of blue makes things look "whiter", courtesy of your auto white balance.
Lord Kelvin, amongst other things, postulated that if water freezes at zero degrees Celsius or 0° C, and alcohol freezes even lower at -18° C then all matter must freeze at some even lower temperature. He worked out that at -273° C all matter freezes. All electrons stop spinning around every nucleii. This temperature is called absolute zero. It is usually written as zero degrees Kelvin or 0° K. The colour of white is expressed as a temperature. It is expressed as the temperature, in degrees Kelvin, to which a black cube of carbon must be raised, to produce a light with the same colour as the white light we are categorising. As you can probably imagine, a cube of black carbon is only black while it is cool. As its temperature is raised it will begin to glow red, then orange, then yellow, then creamy white, then white, then bluish white. This characteristic of light is called its colour temperature. You just match the colour and read off the temperature. (The reason the block goes up past white to bluish-white and beyond is that the white reference in our heads is based on our yellow sun, hence any light hotter or whiter than this will look bluish-white. If our sun was hotter and put out bluish-white light then our reference would be more blue and the colour temperature we call white would move further up the chart. If our sun was the hottest one around then the top of the chart would be called white because nothing more blue would exist.)
Our solar system revolves around Sol, our sun. Its atomic conversion process produces a light which is decidedly yellow compared to distant stars (other suns). Its colour reads off as about 5700° K (it can be anywhere from 5500° K to 6270 ° K) on our carbon block chart.
We live on the its third planet which happens to have a nitrogen (80%) atmosphere, mixed with a little bit of oxygen (20%)(a most important bit if we want to breathe). The light from the sun must pass through this nitrogen/oxygen mix on its way from the sun to our eyes. It just so happens that the size of the molecules of these gases causes them to act like a low pass filter which filters out some of the high frequency energy coming from the sun that we call blue light. This means that the colour temperature of the sun's direct light drops a bit as it passes through the atmosphere (to 5100° K in Australia at noon in September) and is a little bit bit more orange than it would be as seen from a spacestation (5700° K). Of course the atmosphere takes on a blue glow from the blue light it managed to steal from the sunlight passing through it. This blue glow, which makes the sky look blue to us living down here underneath it, causes the colour temperature of the indirect sunlight to increase (to 7000° K in Australia at noon in September). It increases the colour temperature of the light in open-shade even further (to 9000° K in Australia at noon in September). It is also the reason the sun looks yellow to us, even though it provides the white reference for our auto white balance. The sun + the blue sky illuminate the clouds which provided our ref white (around 7200° K). The sun itself is too bright for anything more than the briefest of glimpses. If we glance at the sun briefly, our auto white balance hasn't time to readjust to the yellow-white light of the sun, so we still see it as though it was too blue. Meaning our brain continues as it was, not adding any blue to the sunlight, leaving a preponderance of red and green. Red and green, when combined, produce yellow. (Remember we're talking about light not ink.) So the sun looks yellow. If we had the capacity to keep looking at the sun for longer, without damage to our eyes, we would see it turn white, as the blue reception of our brain increases. If we look at stars, similar to our sun, at night, there's no blue sky to interfere with our auto white balance and they look yellow against the black sky, as they should.
On top of this, the atmosphere is modified by human and volcano air pollution, the smoke of forest and bush fires that always seem to be burning around the world at any one time and the dust storms which also rage around the world from time to time. These combine to add a reddish-brown tint to any sunlight that manages to fight its way through to the surface. They also add variability to the colour temperature and trying to pin it down, is like trying to hold a politician to his pre-election promises. Most figures quoted are only averages and you may not get the same ones if you go out and try to measure them.
The planet we live on is a sphere and spins on an axis in such a way, as to make the sun generally shine straight down at right angles to the planets surface at the equator, but at an oblique angle at the poles. The fact that the spin axis is leaning over slightly gives some relief to the previous statement but only over about one third of the distance from the equator and the poles. (from the tropic of Capricon to the tropic of cancer and back) You can probably see from fig. 109 that, as the sun shines more obliquely, its light has to pass through more of the atmosphere and hence loses more blue light making it more and more orange.
If we consider the earths atmosphere, consisting of the Troposphere + the Stratosphere + part of the Ionosphere, to be 200 miles thick then :-
We've all seen the beautiful golden sunrises and orange sunsets when the sun's light is passing just about horizontally through the atmosphere and almost all the blue light, and even some of the green, is absorbed by the atmosphere. We run into this problem when we want to take colour pictures with our still cameras. When you buy a roll of colour film you'll notice that the correctness of the colours is only guaranteed if you take the pictures between 10am and 2pm when the sun is pretty well overhead and its light is passing through the minimum of atmosphere.
- At the equator the sunlight passes through 200 miles of atmosphere.
- In Australia the sunlight passes through 200/sin(90° - 30°) = 200/sin60° = 230 miles.
- In Scotland the sunlight passes through 200/sin(90° - 58°) = 200/sin32° = 377 miles.
- In Sweden, Norway and Finland the sunlight passes through 200/sin(90° - 62°) = 200/sin28° = 426 miles.
If we think about this for a minute and use ballpark figures, lets assume the sun is directly over the equator. We'll call this 0° at 12noon at the equator. As the earth spins at 15° per hour, at 2pm the earth will have moved 30° at the equator. Australia is 30° from the equator, so the difference in thickness of atmosphere will be the same as from 12noon to 2pm at the equator. Scotland is 60° from the equator, that's equal to four hours or from 12noon to 4pm at the equator. The average of Scandinavia is at 65°, or about 4.20pm at the equator. There is little change in colour of the sun from 12noon to 2pm (film can handle it) but the change is definitely noticeable at 4pm and 4.20pm.
Fig. 109 not only shows the extra atmosphere that Scottish sunlight has to shine through but also the fact that it has to cover more area of the earths surface as well. This means that the sunlight is not as bright. In fact the Scottish sunlight is less than half as bright as Australia's sunlight. This explains the "peaches and cream" complexion of the British compared to us "bronzed Aussies". The closer you get to the poles the duller the sunlight gets, which is why Sweden recommends driving with the headlights switched on in their cars in daylight, whereas in Australia the sunlight is too bright for this to have much effect unless you put your headlights on hi-beam, but then, unfortunately, you blind everyone else and defeat the purpose of increased safety in putting them on in the first place. Australia's bright sunlight is also the reason for our high skin cancer and eye cataract rate, especially for blue-eyed people who would have less problems living in the Scandinavian countries.
The colour of the clouds, that we have used as the reference for our built-in auto white balance, depends whereabouts on this sphere we grew up. Australia, which is much closer to the equator than Britain or Europe, has a brilliant white daylight of about 7000° K. Unfortunately the people, too whom we entrusted the selection of our colour TV system, chose the British Pal variant. The British Colour TV Committee, doing the right thing by its population, chose a colour temperature for its TV White which suited the British people. In the words of a British colour TV handbook of the day, they took the "bluish-white colour of the sky scattered daylight over Scotland" as their reference. The sunlight hits the sky there quite obliquely and the result was a colour temperature of 6500° K. Much pinker than the Australian "sky scattered daylight". If you compare the white on your TV screen to incandescent lamps, it is bluish-white, but if you open the curtains and look at the TV in "sky scattered daylight", the TV white looks pink. Overall this means that Australian TV pictures dont have as much Zing as they could have had if we had chosen our own colour temperature.
There is one posibility that is incredibly clever and devious at the same time. When TV first started, the idea was promulgated that you should not watch TV in the dark. You should always watch with a background light turned on to reduce the contrast, of the TV image to the black darkened room. As most people follow this advice and watch TV in the night with a background light turned on, its just possible that their eyes are auto white balanced to the colour temperature of the background light, usually an incandescent lamp. The colour temperature of these is usually around 3500° K. Now the 6500° K TV screen is going to look much bluer than the incandescent lamp and our brain could be tricked into thinking the TV is actually up around 9000° K. Because our auto white balance is not perfect it would be probably around 7500 to 8000° K. Just right for our Australian Daylight. Now that would be sneaky.
Who'd a thought that the answer to such a simple question could be so complicated and we only just scratched the surface!
The colour temperature measurements were done using a Minolta XY Chroma Meter at noon on Sept13 2000. I would like to thank Paul Doyle for his help with this.
Fig 109 is representative only, as the sun is so far from the earth the actual sunbeams reaching the earth would arrive in parallel. Look at the drawing as though you a looking past the earth at the sun in the distance.
Brain Storm. This section is going to be a bit different to the previous ones. You're going to follow me through a brain storming session but you wont be loafing because you're going to brain storm as well. This section will be laid out in a number of short segments. At the end of each one, will be a question to give you time to mull over the problem. When you think you're ready just click on "next" to continue and see if you came up with the same idea that I did.
So put on your thinking cap and here we go!
Brainstorm One. Brainstorm Two. Brainstorm Three. Brainstorm Four.
The above information was compiled with the help of the following people :-
Darren Yates, Mark Gibbons, Paul Doyle.
I would like to express my gratitude to them for their putting up with my sometimes difficult and stupid questions.
All of the above diagrams were drawn my me. I apologise in advance if you find them a bit finicky but it is tricky to get that much info into so few pixels while keeping the files as short as possible.
I hope you find this page useful. Please remember to use the above information wisely.
© Gary Yates Locofonic Recordings Australia firstname.lastname@example.org
This page first written 20-2-2000 last updated 30-9-2001.