Red Colour Signal
Please wait for the green signal.

Locofonic
G'day

Scanline Pattern of Interlaced TV System.
Fig. 1

Field Groups
Fig. 2

Differentiator & Integrator
Fig. 3

Field Groups
Fig. 4

Differentiator & Differentiator
Fig. 5

Field Groups
Fig. 6

Digital TV Trigger
Fig. 7

Power Reducer 1
Fig. 8

Power Reducer 2
Fig. 9

Power Reducer 3
Fig. 10

Power Reducer 4
Fig. 11

Power Reducer 5
Fig. 12

Power Reducer 6
Fig. 13

Power Reducer 7
Fig. 14

Power Reducer 8
Fig. 15

Power Reducer 8
Fig. 15a

Generating DC volts from CRO Cal sig
Fig. 16

CRO Cal sig into DC
Fig. 17

AC Coupling 1
Fig. 18

AC Coupling 2
Fig. 19

Peak Rectifier
Fig. 20

CRO Cal sig into DC
Fig. 21

CRO Cal sig into DC
Fig. 22

CRO Cal sig into DC
Fig. 23

Cockcroft-Walton Multiplier
Fig. 24

CRO Cal sig into DC
Fig. 25

CRO Cal sig into DC
Fig. 26

CRO Cal sig into DC
Fig. 27

CRO Cal sig into DC
Fig. 28

CRO Cal sig into DC
Fig. 29

CRO Cal sig into DC
Fig. 30

CRO Cal sig into DC
Fig. 31

CRO Cal sig into DC
Fig. 32

It's a Wonder it works at all.
Fig. 33

Standard UJT Circuit
Fig. 34

Standard PUT Circuit
Fig. 35

Internals of SCR & PUT
Fig. 36

Basic Transistor PUT Circuit
Fig. 37

Hi Speed Transistor PUT Cct
Fig. 38

Hi Speed Transistor PUT Cct
Fig. 39

Vx Stabilised Hi Speed Transistor PUT Cct
Fig. 40

Improved Hi Speed Transistor PUT Cct
Fig. 41

Super Improved Transistor PUT Cct
Fig. 42

The Linearised PPUJT Circuit
Fig. 43

Another Linearised PPUJT Circuit
Fig. 44

The Linearised & Buffered PPUJT Circuit
Fig. 45

The Basic Buffered Stairstep PPUJT Circuit
Fig. 46

A Pulsed Current Linear Stairstep PPUJT Circuit
Fig. 47

The Feedback Linearised Stairstep PPUJT Circuit
Fig. 48

The Feedback Linearised Stairstep PPUJT Circuit
Fig. 49

A Feedback Linearised Variable Stairstep PPUJT Circuit
Fig. 50

The Feedback Linearised Variable Stairstep PPUJT Circuit
Fig. 51

A Real Ex-or Gate for Comparison
Fig. 52

A Quickie Ex-or Gate
Fig. 53

A Quickie Ex-nor Gate
Fig. 54

Twin Transistor Ex-or and Ex-nor Gates
Fig. 55

Single IC Ex-or and Ex-nor Gates
Fig. 56

A Long Way Round for a Short Cut
Fig. 58

4070
Fig. 61

Truth Table
Fig. 62

Switched Delay
Fig. 63

Schmitt Trigger1
Fig. 64

Schmitt Trigger2
Fig. 65

Hi Gain Amp
Fig. 66a

Hi Gain Amp
Fig. 66b

Inverting Comparator
Fig. 67

Non Inverting Comparator
Fig. 68

Switched Polarity Comparator
Fig. 69

Inverting Integrator
Fig. 70

Operating the 4070 on 6v
Fig. 71

Operating the 4070 on 6v
Fig. 72

Automatic Voltage Controlled Invertor
Fig. 73

Simple Frequency Doubler
Fig. 74

Wide Range Frequency Doubler
Fig. 75a

Wide Range Frequency Doubler
Fig. 75b

S notR Flipflop
Fig. 76

AC Coupling 1
Fig. 77

AC Coupling 2
Fig. 78

AC Coupling 3
Fig. 79

AC Coupling 4
Fig. 80

AC Coupling 5
Fig. 81

AC Coupling 6
Fig. 82

Video Sync Seperator 1
Fig. 83

Video Sync Seperator 2
Fig. 84

Video Clamp 2
Fig. 85

Improved Video Clamp 1
Fig. 86

Improved Video Clamp 2
Fig. 87

Improved Video Clamp 3
Fig. 88

Power On Reset Gen 1
Fig. 89

Power On Reset Gen 2
Fig. 90

Delayed Pulse Gen 1
Fig. 91

Delayed Pulse Gen 2
Fig. 92

Delayed Pulse Gen 3
Fig. 93

Delayed Pulse Gen 4
Fig. 94a

Delayed Pulse Gen 5
Fig. 94b

Positive Triggered Half Monostable
Fig. 95

Negative Triggered Half Monostable
Fig. 96

Pos Trigger Half Mono with Switched O/P Polarity
Fig. 97

Neg Trigger Half Mono with Switched O/P Polarity
Fig. 98

Positive Triggered Full Monostable
Fig. 99

Positive Triggered Almost Full Monostable
Fig. 100a

Negative Triggered Almost Full Monostable
Fig. 100b

Oscillator
Fig. 101a

Variable Oscillator
Fig. 101b

 Variable Oscillator
Fig. 101c

Voltage Controlled Oscillator
Fig. 101d

Voltage Controlled Oscillator
Fig. 101e

Alternating Switch
Fig. 102

Alternating Switch
Fig. 103

Divide by 2
Fig. 104

2 Gate Divide by 2
Fig. 105

Super Simple 2 Gate Divide by 2
Fig. 106

Tri-Colour Chart
Fig. 107

Colour Temperature Chart
Fig. 108

Sunlight falling on a planet
Fig. 109

Measuring the Immeasurable
Fig. 110a

Measuring the Immeasurable
Fig. 110b

Normal 74C926 Circuit
Fig. 111

Simple Zero Detector
Fig. 112

Simple SR Flipflop
Fig. 113

Simple Way to Turn Off Drivers
Fig. 114

Getting It All Together
Fig. 115

Complete Zero Blanking Circuit
Fig. 116

Transistorised Zero Blanking Circuit
Fig. 117

Zero Blnk. for First 74C926 in 8 Digit Counter
Fig. 118

Zero Blnk. for Second 74C926 in 8 Digit Counter
Fig. 119

Zero Blnk. for First 74C926 in 12 Digit Counter
Fig. 120

Zero Blnk. for Middle 74C926 in 12 Digit Counter
Fig. 121

Zero Blnk. for Third 74C926 in 12 Digit Counter
Fig. 122

Wide Range Pulse Stretcher
Fig. 130a

Wide Range Pulse Stretcher
Fig. 130b

Cascading Multiple CMOS 4017s
Fig. 131

Cascading Multiple CMOS 4017s
Fig. 132

Cascading Multiple CMOS 4017s
Fig. 133

Cascading Multiple CMOS 4017s
Fig. 134

Cascading Multiple CMOS 4017s
Fig. 135

Cascading Multiple CMOS 4017s
Fig. 136

Cascading Multiple CMOS 4017s
Fig. 137

Cascading Multiple CMOS 4017s. Final Circuit.
Fig. 138

Dividing by Something and a Half.
Fig. 141

Input Logic in the 4518 & 4520.
Fig. 142

Clock Pulse Doubling Cct for the 4518 & 4520.
Fig. 143a

Cheaper Clock Pulse Doubling Cct for the 4518 & 4520.
Fig. 143b

Cheaper Clock Pulse Doubling Cct for the 4518 & 4520.
Fig. 143c

Typical CMOS Input Protection
Fig. 144

Wiring up the 4518 Incorrectly
Fig. 145

Getting the 4518 to Divide by 4.5
Fig. 146

Getting the 4518 to Divide by 5.
Fig. 147

Getting the 4518 to Divide by 10 with a Squarewave output.
Fig. 148

Sinewave Measurements.
Fig. 151

Sinewave Measurements.
Fig. 152

Power Transformer 1.
Fig. 153

Losses in Power Transformer.
Fig. 154a

Insulation Breakdown in Power Transformer.
Fig. 154b

Step-up Power Transformer.
Fig. 155

Ringing Inductor.
Fig. 156

Cockroft-Walton Multiplier.
Fig. 157

Ion Leakage Tester block diag.
Fig. 158

Isolation Power Transformer.
Fig. 159

Floating Power Transformer Secondary.
Fig. 160

Back-to-Back Power Transformers.
Fig. 161

One-to-One Power Transformer.
Fig. 162

2000v Cockroft-Walton Multiplier.
Fig. 163

Variable 2000v Cockroft-Walton Multiplier.
Fig. 164

Full Wave Cockroft-Walton Multiplier.
Fig. 165

12 Stage Cockroft-Walton Multiplier.
Fig. 166

Cockroft-Walton Multiplier with Series Caps.
Fig. 167

Two-Phase Cockroft-Walton Multiplier.
Fig. 168

Half Wave Cockroft-Walton Multiplier.
Fig. 169

Full Wave Cockroft-Walton Multiplier.
Fig. 170

Transformation of Cockroft-Walton Multiplier.
Fig. 170a

Transformation of Cockroft-Walton Multiplier.
Fig. 170b

Full Wave Cockroft-Walton Multiplier with Voltage Equalisation.
Fig. 171

Fixed 2000v DC Supply.
Fig. 172

Variable 2000v DC Supply.
Fig. 173

Transistor Control of Power Transformer.
Fig. 174

Variac Control of Power Transformer.
Fig. 175

Variable 2000v DC Supply with Metering.
Fig. 176

Ionisation Tester Circuit.
Fig. 177

Ionisation Tester with Auto Cut-out.
Fig. 178

Final Circuit of Ionisation Tester.
Fig. 179

Final Ion Tester Circuit part A.
Fig. 179a

Final Ion Tester Circuit part B.
Fig. 179b

Final Ion Tester Circuit part C.
Fig. 179c

Standard Fullwave Rectifier.
Fig. 180

Final Circuit of Ionisation Tester.
Fig. 181

Final Circuit of Ionisation Tester.
Fig. 182

Final Circuit of Ionisation Tester.
Fig. 183

Final Circuit of Ionisation Tester.
Fig. 184

Final Circuit of Ionisation Tester.
Fig. 185

Final Circuit of Ionisation Tester.
Fig. 186

Final Circuit of Ionisation Tester.
Fig. 187

Final Circuit of Ionisation Tester.
Fig. 188

Final Circuit of Ionisation Tester.
Fig. 189

Final Circuit of Ionisation Tester.
Fig. 190

Final Circuit of Ionisation Tester.
Fig. 191

Final Circuit of Ionisation Tester.
Fig. 192

Final Circuit of Ionisation Tester.
Fig. 193

Final Circuit of Ionisation Tester.
Fig. 194

Final Circuit of Ionisation Tester.
Fig. 195

Final Circuit of Ionisation Tester.
Fig. 196

Green Colour Signal
Full steam ahead.





The above information was compiled with the help of the following people:-
Darren Yates, Mark Gibbons, Paul Doyle.
I would like to express my gratitude to them for their putting up with my sometimes difficult and stupid questions.

  All of the above diagrams were drawn my me. I apologise in advance if you find them a bit finicky but it is tricky to get that much info into so few pixels while keeping the files as short as possible.

  I hope you find this page useful.

 

  ©  Gary Yates   Locofonic Recordings Australia  
This page first written 20-2-2000 last updated 30-9-2001.